Soan Papdi FPGA

Soan Papdi is a learning-focused FPGA board built on the Lattice iCE40UP5K — the same FPGA family used inside the iPhone 7 by Apple Inc.

No, its not the Diwali sweet — its the easiest way to start learning FPGA.

Watch this👇

Soan Papdi FPGA Product Video

The best part is how simple it feels.

Skip the complex setup and manual pin configurations.

Just connect the blocks, and deploy your digital circuits directly to the FPGA, without writing complex HDL.

FPGAs are very powerful… but let’s be honest — getting started is very painful.

1. Too complex.
2. Too many tools.
3. Too many things that can go wrong.

And this is exactly where most people give up.

One day, Piyush Itankar and I were discussing this problem.

He said, “What if we build our own FPGA board?”

Not another board for experts, but something designed for people who just want to start. So we decided to build it.

Over the next 8 months, we designed, tested, failed, and improved — step by step.

Soan Papdi Journey Video

And finally, Soan Papdi was born.

A board where you don’t fight the complex setup — just connect and deploy your ideas on real hardware.

Here’s what our early users are saying about Soan Papdi.

Excited to try this yourself?

Get your Soan Papdi → Link

On the top, you’ll find 8 yellow LEDs (D7 to D0).

These LEDs are not random random, we choose 8 LEDs because 8-bit data is very common digital systems.

When you build projects like counters or state machines, you can directly visualize the output on these LEDs in real time.

Right next to yellow leds, we have 4 white LEDs.

These are used for status signals — for example, carry or overflow — so you can easily understand what’s happening in your circuit.

At the bottom, we have two sets of switches:

1. Set A: A3 to A0
2. Set B: B3 to B0

These allow you to input two 4-bit numbers directly into your circuit.

Now you can perform operations like addition or subtraction and instantly see the result on the LEDs.

No simulation — just real, visual feedback.

On the right side, there are 10 GPIO pins.

These let you connect external components like sensors or modules.

For example, you can connect an IR sensor to control all the LEDs (D0–D7).

This is where things get really interesting — you’re no longer limited to just the board.

You can interact with the real world.

Want to try this yourself?

Get your Soan Papdi board→ Link

At the core of the board is the Lattice iCE40UP5K FPGA.

We chose this FPGA for one simple reason: the open-source community loves it.

It’s easy to program using open-source tools, making it perfect for beginners.

At the same time, it’s powerful enough, having sufficient LUTs — to even run a RISC-V CPU.

You might be thinking — FPGAs are complex.

But getting started doesn’t have to be.

To make things easier, Piyush Itankar has created a Digital Electronics 101 course, where everything is explained step by step.

Start learning here:

1. Soan Papdi FPGA 101 Course by Piyush → Link

You don’t have to start from scratch.

With iCE Studio, you can explore built-in examples and learn by doing.

Start simple — build basic gates like AND, OR, or a decoder.

Then gradually move to advanced projects like running a RISC-V CPU.

Explore here:

RISC-V CPU Example in iCE Studio Repo → Link

Core Hardware

1. FPGA: Lattice iCE40UP5K (Datasheet Link)
2. Logic Resources: 5280 LUTs
3. Embedded Memory: 120 Kbit Block RAM
4. SPRAM: 1 Mbit (128 KB) Single-Port SPRAM
5. Clocking: On-chip PLL
6. Internal Oscillators: 10 kHz and 48 MHz

Peripherals and Interfaces

1. Hard IP: 2 × SPI, 2 × I²C
2. DSP Resources: 8 × DSP multiplier blocks
3. Onboard Storage: 128 Mbit Flash memory
4. USB: USB-C (fully controlled by FPGA, no external MCU)

User Interface

1. LEDs:
2. 8 × 3.0 mm through-hole LEDs
3. 4 × SMD status LEDs
4. Input:
5. 8 × DIP switches
6. 2 × push buttons (Programming & Reset)
7. GPIO:
8. 10 × I/O pins for external sensors & peripherals

Development and Programming

1. Programming: Via preloaded DFU bootloader
2. Toolchain Support: Open-source tools including
3. Yosys
4. nextpnr
5. Project IceStorm
6. Icarus Verilog
7. Amaranth HDL

Processing Capability

1. Capable of hosting RISC-V soft-core CPUs

If you’re programming Soan Papdi using Verilog, you can use this pin diagram to map pins in your .pcf file.

Want to start your FPGA journey the simple way?

Get your Soan Papdi board and start building today.

Buy Now → Link

Limited stock available — order before it runs out.

Have questions? Feel free to reach out, happy to help. 🙂

Email: hardikseth1975@gmail.com

LinkedIn: https://www.linkedin.com/in/hardik-seth-8687b7201/

WhatsApp/Contact: +91 9026278822